This Technical Note is motivated by the need to develop
efficient and accurate computer
modeling of the electro-deposition process commonly used in the fabrication of
chip interconnections. A main
difficulty owes to the fact that the deposition process is controlled at the bulk (wafer)
scale, while the chip features to be produced are microscopic by comparison.
Therefore, to accurately model the process computationally, the discretization must
be done in such a way that the microstructural behavior is captured. A brute force approach
to this would result in extremely large computational problems.
Instead we propose an approach based on a combination of multiscale asymptotics
The asymptotics allows us to first compute the solution in the bulk, having
averaged out the microstructures. Secondly, the bulk solution, whose computation
does not require a very fine discretization, is corrected by adding
terms which may be calculated at the microstructural cell level (independently
of the bulk solution). Inherent in the
approach is the assumption that the microstructure is locally periodic.
We demonstrate the proposed computational approach for a simple 2-D example
in order to assess its accuracy. A rigorous mathematical justification of
the approach, which can be accomplished using homogenization theory, is deferred
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